It turns out that the reader is a bit different than the Magtek-based (and comptible) units that Stripe Snoop is written to talk to. Like the "standard" units, the ZU-1427ND reader has three signals, "card present" (CP), DATA, and Clock. The CP and DATA signals are both active-low (i.e. 0V = "1", 5V = "0") like the standard reader, but the Clock signal is inverted and active-high, or in other words, strobes the data on a low-to-high transition.
No big deal I thought... Since the signals needed to be buffered anyway, running the clock through an inverter before wiring it to the PC parallel port would be simple enough. However, I soon discovered that the ZU-1427ND card reader had another interesting quirk. After hooking the card reader up to the PC, the Stripe Snoop software saw nothing but a string of zeros coming out of it. So I broke out the logic anayzer to see what was coming out of the reader. The picture below shows the output. (Don't bother trying to decode it... It doesn't show the whole swipe and it's only my AAA card at that...)
Unlike the Magtek-based readers, the DATA line of this reader always returns to zero between each bit transmitted. When multiple successive ones are transmitted a Magtek-type reader, the DATA line is held low until the next zero occurs. And when a zero occurs after a one, the return to zero happens much later, just microseconds before the clock line strobes the next bit. When two or more successive ones occur on the Panasonic reader, the DATAline goes high shortly after the clock strobes the first one, and then returns low prior to the clock strobing the second one. I think with all of the Windows overhead, Stripe Snoop is sampling the DATA line during this return to zero.
So I looked through my parts drawer and found a 74F373 latching buffer. This was perfect... I ran the DATA line through one of these buffers and tied the latch gate to the inveretd clock. The '373 is a tri-state device, but since I didn't need the High-Z state, I tied the output enable (OE) to ground. This is the schematic of the complete intetrface circuit.
By latching the data line with the inverted CLOCK, the data state is held for the entire clock cycle and this gives Stripe Snoop a chance to read the DATA. In the timing diagram below, you can see the effect of the latching of the DATA signal and how the resulting output does not return to zero between successive ones by comparing the areas circled by two ovals.
Overall, while the reader works, the heads cannot be easily modified to read track 3 on the card. (You can still read track 1 by using the "shim method" though.) I think I will continue to keep an eye out for a cheap Omron model or perhaps a reader that can read all three tracks natively.
